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Standard
Hybrid DC/DC Converter Derating Criteria
1.0 Scope
This criteria
provides design ground rules for MDI standard hybrid DC/DC Converters.
It is superseded by specific customer requirements. This document
is based on the requirements of MIL-STD-454 requirement 18, MIL-STD-975
and MIL-PRF-38534.
2.0 Capacitors
2.1 Solid
Tantalum (CWR or equivalent) shall be derated to 50% of
steady state rated voltage as a goal, with an absolute maximum of
70% with design approval. Transient voltages shall not exceed the
manufacturer's rated values. Worst case ripple current shall not
exceed manufacturer's rating at maximum operating temperature. An
impedance of 1 OHM per volt or the equivalent obtained by circuit
impedance or rate of voltage rise control shall be provided to limit
surge current.
2.2 Ceramic
(CDR or equivalent) shall be derated to 60% of steady state rated
voltage as a goal, with an absolute maximum of 80% with MDI design
approval. Transient voltages shall not exceed the manufacturer's
rated transient values. Worst case ripple current shall not exceed
manufacturer's rating at maximum operating temperature.
3.0 Microcircuits
The derating
of microcircuits shall conform to MIL-STD-975 Revision G, Paragraph
1.2.2.
4.0 Resistors
The derating
of printed resistors shall be in accordance with the requirements
of MIL-PRF-38534.
The derating
of discrete and chip resistors within the hybrid shall conform to
MIL-STD-975 Revision G, Paragraph 1.2.3.
5.0 Semiconductors
The derating
of semiconductors shall be in accordance with MIL-STD-975 Revision
G, Paragraph 1.2.4.
6.0 Magnetic
Components
The derating
of Magnetic Components shall be in accordance with MIL-STD-975 Revision
G, Paragraph 1.2.5 and 1.2.6 except that an operating voltage of
90% of rated is permissible and a temperature relaxation of 20C
is permissible.
7.0 Bond
Wires
Bond wire sizing
shall be sized in accordance with MIL-H-38534, based on worst case
peak currents.
8.0 Conductor
Tracks
Printed Conductor
tracks shall be sized in accordance with MIL-PRF-38534, based on
worst case peak currents.
9.0 Voltage
Breakdown Between Insulated
Points
The spacing
between printed conductors, between bond wires and printed conductors,
between package pins and the case, etc., shall be verified by design
to permit a 50% derating of DC breakdown voltage at the worst case
atmospheric conditions.
Effective 9/20/92
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